The structure of a high voltage MOS transistor, made in a standard-CMOS-process, is de-picted below. The required high break-through-voltage of the drain is made by a low diffused drift region between channel and drain-contact:
The transistors with the structure above has a different behaviour as commonly used MOS-Transistors. Therefore we use a macromodel-extension for the BSIM3v3 model. This macro-model considers also the different and high temperature-dependence of the break-through-voltage of the drain- and source-Diode. The macro-model is available in a Subcircuit:
In the Output characteristic below is the advantage of the proposed HVT-macro-model (IDMO2) compared with a build in MOS-Modell (IDMO1):
Output characteristic Vgs=1.4, 2.3, 3.2, 4.1, 5V, Vbs=0V
