Sometimes in modeling work it is necessary to make technological verification with the help of device simulator. The program PISCES II of the Stanford University / USA offer following possibilities:
Following pictures are showing an simple NMOS (1.5um) example. After input of technological and process data we get an contour plot of doping and a doping profile.
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With this entries the program computed the drain current component as a function of gate- and drain voltage with constant bulk bias.
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